The performance of high power transistor devices is intimately connected to the substrate thermal conductivity. In this study, the relationship between thermal conductivity and dislocation density is examined using the 3 omega technique and free standing HVPE GaN substrates. Dislocation density is measured using imaging cathodoluminescence. In a low dislocation density regime below 10(5) cm(-2), the thermal conductivity appears to plateau out near 230 W/K m and can be altered by the presence of isotopic defects and point defects. For high dislocation densities the thermal conductivity is severely degraded due to phonon scattering from dislocations. These results are applied to the design of homoepitaxially and heteroepitaxially grown HEMT devices and the efficiency of heat extraction and the influence of lateral heat spreading on device performance are compared. (c) 2006 Elsevier Ltd. All rights reserved.
Thermal conductivity, dislocation density and GaN device design
Mion, C., Muth, J. F., Preble, E. A., & Hanser, D. (2006). Thermal conductivity, dislocation density and GaN device design. Superlattices and Microstructures, 40(4-6), 338-342. https://doi.org/10.1016/j.spmi.2006.07.017