Bonding for 3-D integration of heterogeneous technologies and materials
Modern electronic applications demand more and more complex, multifunctional microsystems with performance characteristics which can only be achieved by using best-of-breed materials and device technologies. Three-dimensional (3-D) integration of separate, individually complete device layers provides a way to build complex heterogeneous microsystems without compromising the system performance and fabrication yield. In the 3-D integration approach, each device layer is fabricated separately using optimized materials and processes. The layers are bonded and interconnected through area array vertical interconnects with lengths on the order of microns. This paper will review bonding techniques for high density area array 3-D integration of integrated circuits, focusing on techniques suitable for die-to-die and die-to-wafer bonding configurations.