High density vertical interconnects for 3-D integration of silicon integrated circuits

Dean M. Malta; Dorota S. Temple; Christopher A. Bower; Christopher A. Bower; Dean M. Malta; Dorota S. Temple; JE Robinson; PR Coffman; MR Skokan; TB Welch

High density vertical interconnects for 3-D integration of silicon integrated circuits

Bower, C., Malta, D., Temple, D., Robinson, JE., Coffman, PR., Skokan, MR., & Welch, TB. (2006). High density vertical interconnects for 3-D integration of silicon integrated circuits. Proceedings of the IEEE, 399-403. https://doi.org/10.1109/ECTC.2006.1645677

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Abstract

This paper describes a technology platform being developed for three-dimensional (3-D) integration of thin stacked silicon integrated circuits (ICs). 3-D integration technology promises to dramatically enhance on-chip signal processing capabilities of a variety of sensor and actuator array devices hybridized with silicon read-out electronics. Currently, advanced 3-D integrated infrared focal plane array detectors are being developed within the DARPA vertically integrated sensor arrays (VISA) program. Here, we describe the 3-D integration process flow and demonstrations developed in the VISA program.