High density vertical interconnects for 3-D integration of silicon integrated circuits
Bower, C. A., Malta, D., Temple, D., Robinson, J. E., Coffman, P. R., Skokan, M. R., & Welch, T. B. (2006). High density vertical interconnects for 3-D integration of silicon integrated circuits. In 56th Electronic Components and Technology Conference, 2006. San Diego, CA. May 30-June 2, 2006, pp. 399–403. .
This paper describes a technology platform being developed for three-dimensional (3-D) integration of thin stacked silicon integrated circuits (ICs). 3-D integration technology promises to dramatically enhance on-chip signal processing capabilities of a variety of sensor and actuator array devices hybridized with silicon read-out electronics. Currently, advanced 3-D integrated infrared focal plane array detectors are being developed within the DARPA vertically integrated sensor arrays (VISA) program. Here, we describe the 3-D integration process flow and demonstrations developed in the VISA program.