3-D integration technology for high performance detector arrays
This paper describes a technology for three-dimensional (3-D) integration of multiple layers of silicon integrated circuits. The technology promises to dramatically enhance on-chip signal processing capabilities of a variety of detector devices hybridized with Si electronics. The focus of the paper is on high performance infrared focal plane arrays based on HgCdTe, which offer the ultimate in infrared sensitivity and find application in high performance military systems. Performance data from test FPA devices with integrated multilayer Si stacks are discussed in this paper.
Temple, D., Bower, C., Malta, D., Robinson, JE., Coffman, PR., Skokan, MR., ... Takahashi, K. (Ed.) (2006). 3-D integration technology for high performance detector arrays. MRS Proceedings, 970, 0970-Y03-04. https://doi.org/10.1557/PROC-0970-Y03-04