3D Integration Technology
RTI is a leader in 3D integration technology, having developed a wide range of 3D process capabilities and achieved successful demonstrations of 3D integrated circuit (IC) stacks, advanced silicon interposer wafers, and 3D passive device structures. We have been conducting research and development in 3D integration since 1999, building on decades of experience in the development of advanced microfabrication and packaging technologies.
We work with a wide variety of clients and partners, bringing integrated process, design, testing, and analysis capabilities to projects involving custom application-driven development. We offer access to our 3D technology platform through joint development projects, prototyping services, and small volume production.
Process Technologies
- Through-silicon via (TSV) interconnects
- Wafer thinning and temporary carrier wafer
- High-density metal-metal and polymer bonding
- Large-area multi-level metal routing
Applications
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3D integrated circuits and 3D packaging
- CMOS IC wafer thinning to <20 µm active Si thickness
- Die bonding using either metal-to-metal or polymer bonding
- Through-wafer interconnects: 4–100 µm diameter, 8:1 aspect ratio, and densities up to 5x105/cm2
- Electrical operability of 99.98% demonstrated for arrays of more than 65,000 interconnects
- Silicon interposer and multi-level routing metallization
- TSV-enabled 3D passives
Brochures
Contact us for more information
- Dean M. Malta